PCB Supplier

Controlled Impedance

±5% impedance — verified per panel.

50 Ω single-ended, 90 Ω / 100 Ω differential — simulated in Polar Si9000, validated with TDR coupon test on every build panel. Your stack-up PDF ships before the boards.

Tolerance
±5%
Si9000
Polar
Coupon per panel
TDR
Verified
100%
Tolerance
±5%
TDR
Per-lot coupon

Target Impedances

Common controlled-impedance targets

50 Ω
Single-ended
RF · clock · general digital
75 Ω
Single-ended
Video · broadcast
90 Ω
Differential
USB 2.0
100 Ω
Differential
USB 3.x · PCIe · LVDS

Verification

TDR coupon on every panel

We add an impedance test coupon to every controlled-impedance panel. The coupon is measured on TDR, results logged and shipped with the order.

  • Polar Si9000 simulation before fab
  • Test coupon added to every panel
  • TDR measurement per coupon
  • Pass/fail report with every shipment
  • Raw TDR data on request

Impedance Control — Capability

Published control targets

Controlled Impedance — Spec
Tolerance
Standard±5%
Tight (on request)±3% (Polar Speedstack only)
Target impedances
Single-ended50 Ω · 75 Ω · 100 Ω · custom
Differential90 Ω · 100 Ω · 120 Ω · custom
Supported stack-ups
Layer count2 – 40 layers
SubstrateFR-4 (TG 150/170) · Rogers · Isola · Arlon · hybrid
Copper weight0.5 – 3 oz
Verification
SimulationPolar Si9000 · Polar Speedstack
TDR couponAdded to every panel · 100% measured
ReportsStack-up PDF + TDR pass/fail log per lot

Frequently Asked Questions

Impedance control FAQ

Ask a specialist
01Can you achieve tighter than ±5%?

Yes — ±3% is achievable on select stack-ups using Polar Speedstack optimization. Adds ~3–5 days lead time and a moderate cost uplift.

02Do I need to specify impedance on my Gerber?

Include a ReadMe or impedance table listing: target Z, net names, and reference plane. We’ll simulate and return the stack-up for your approval before cutting copper.

03What simulation tools do you use?

Polar Si9000 is our default. For complex hybrid builds we use Polar Speedstack. Full channel simulation (HyperLynx / ADS) available separately for SI/PI projects.

04What does the stack-up PDF include?

Layer-by-layer dielectric thickness, copper weight, Dk / Df at your target frequency, trace widths for each impedance, and simulated Z₀ with manufacturing tolerance band.

Ready when you are

Send your Gerber & BOM — get a quote in 24 hours.

NDA available · Free DFM review · Senior engineer response.